Operations of a load such as a motor are controlled by connecting a switching element in series with the load. The current flowing to the load is controlled by turning the switching element on and off using a pulse-width modulation signal (hereinafter referred to as a PWM signal) in which the duty cycle varies.
FIG. 12 is a block diagram showing a conventional pulse-width modulation signal device 100 that generates a PWM signal used as this type of control signal and outputs this signal to a load (see Japanese laid-open patent publication number 11-345033 (Page 2, FIG. 8)). The operations of a load 101, e.g., a motor or a solenoid, is controlled by a PWM signal output from a microcontroller 103 by way of an output circuit 102. The microcontroller 103 receives an input signal from an input device 104. The microcontroller 103 includes: a CPU 103a that provides to the output circuit 102 a PWM signal, as depicted in FIG. 13, in which the duty cycle is varied according to the input signal, and a timer/counter 103b that generates interrupt requests for the CPU 103a. 
The CPU 103a sets the PWM signal level to HIGH during a fixed period (Tc) shown in FIG. 13. The level of the input signal received from the input device is converted to a PWM signal pulse width. When the converted value (T1) exceeds a software counter value (S), the level of the PWM signal is set to LOW.
The software counter value (S) is incremented at each interrupt period (Tc) set up by the timer/counter 103b. Each time the CPU 103a receives an interrupt, the counter (S), which increases as time goes on, and the converted value (T1) are compared. Thus, a PWM signal with pulse widths based on input signal levels is generated with a resolution defined by the interrupt period (Tc). In other words, for the PWM signal depicted in FIG. 13, at each fixed period Tc unit pulse signal, the pulse width T1 is determined by the input signal level, and the duty cycle, which is the ratio of the pulse width T1 and the fixed period Tc is varied by the microcontroller 103 between 0% and 100% for each unit pulse signal.
In this conventional pulse-width modulating signal generating device 100, the operation of the load 101 is monitored. If feedback control of the load 101 is to be performed using a PWM signal based on the operating condition, the input device 104 is connected to the load 101, with the input signal level being set by the current flowing to the load 101 to generate the PWM signal. However, there is a delay of at least the fixed period Tc in the duty cycle of the PWM signal reflecting the current flowing to the load 101. The delay reflects the time between when the current flowing to the load 101 is detected and when the unit pulse signal with a duty cycle based on this current is generated. This results in a limit to responsiveness and prevents the accurate control of the load 101.
In another proposed method, multiple types of operation patterns for the load 101 are set up, and sequence control is performed using a PWM signal so that one of these operation patterns is implemented depending on the operation condition of the load 101. Alternatively, no feedback control is performed at all and all operations of the load 101 are controlled via sequence control using a PWM signal. In these control methods, the input device 104 must be equipped with storing means storing signal modulation data for generating new input signals corresponding to these sequences.
However, if the fixed period Tc of the unit pulse signal is set to a short interval (e.g., on the order of a few dozen microseconds), a large amount of modulation data must be stored in storing means in order to generate PWM signals for a series of control periods for the load 101 where the modulation data changes the duty cycle for each unit pulse signal. In particular, generating a PWM signal in which the duty cycle varies over a broad range from 0% to 100% means that the duty cycle must be represented by a large number of bits, thus further increasing the volume of the modulation data to be stored.
Furthermore, when sequence control is to be used on the load 101 for different operation patterns, signal modulation data for these control operations must be generated and stored in storing means for each operation pattern. Thus, even a change in the control period for the operation pattern required the storing of separate modulation data.
Based on the above factors, when modulation data stored in storing means is used to generate PWM signals to control a load, the storage capacity of storing means limited the type of load controls and number of control patterns that could be implemented. This prevented the load from being controlled freely.